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ltc3499/ltc3499b 1 3499fc typical application description 750ma synchronous step-up dc/dc converters with reverse-battery protection the ltc ? 3499/ltc3499b are synchronous, fixed frequency step-up dc/dc power converters with integrated reverse battery protection that protect and disconnect the devices and load when the battery polarity is reversed while delivering high efficiency in a small (3mm 3mm) dfn package. true output disconnect eliminates inrush current and allows zero load current in shutdown. the devices feature an input voltage range of 1.8v to 5.5v enabling operation from two alkaline or nimh batteries. the switching frequency is internally set at 1.2mhz allowing the use of tiny surface mount inductors and capacitors. a minimal number of external components are required to generate output voltages ranging from 2v to 6v. the ltc3499 features automatic burst mode operation to increase efficiency at light loads, while the ltc3499b features continuous switching at light loads. the soft-start time is externally programmable through a small capacitor. anti-ring circuitry reduces emi emissions by damping the inductor in discontinuous mode. the de - vices feature <1a shutdown supply current, integrated overvoltage protection and are available in both 8-pin (3mm 3mm) dfn and 8-pin msop packages. two aa cells to 5v synchronous boost converter l , lt, ltc and ltm are registered trademarks of linear technology corporation. burst mode is a registered trademark of linear technology corporation. all other trademarks are the property of their respective owners. features applications n medical equipment n digital cameras n mp3 players n handheld instruments n reverse-battery protection for dc/dc converter and load n high efficiency: up to 94% n generates 5v at 175ma from a 1.8v input n operates from 1.8v to 5.5v input supply n 2v to 6v adjustable output voltage n inrush current controlled during start-up n output disconnnect in shutdown n low noise 1.2mhz pwm operation n tiny external components n automatic burst mode ? operation (ltc3499) n continuous switching at light loads (ltc3499b) n overvoltage protection n 8-lead (3mm 3mm 0.75mm) dfn and msop packages 4.7h 3499 ta01 ltc3499 sw fb gnd v in v out shdn vc ss offon 10f v out 5v 175ma v in 1.8v to 3.2v 1m 324k 0.01f 330pf 100k 2.2f + battery current vs v in v in and sw voltage (v) ?6 ?1.0 battery current (a) 0 ?2 2 ?4 0 4 3499 ta01b 6 ?0.5 1.0 0.5 shdn = 0v v out = 0v
ltc3499/ltc3499b 2 3499fc pin configuration absolute maximum ratings v in to gnd ..................................................... C 7v to 7v v out to gnd .............................................. C 0.3v to 7v sw to v out ................................................... C 7v to 1v sw to gnd dc ............................................................... C7v to 7v pulsed < 100ns ........................................... C7v to 8v shdn to gnd ................................................. C 7v to 7v (note 1) order information lead free finish tape and reel part marking package description temperature range ltc3499edd#pbf ltc3499edd#trpbf lbrb 8-lead (3mm 3mm) plastic dfn C40c to 85c ltc3499bedd#pbf ltc3499bedd#trpbf lcdz 8-lead (3mm 3mm) plastic dfn C40c to 85c ltc3499ems8#pbf ltc3499ems8#trpbf ltbrc 8-lead plastic msop C40c to 85c ltc3499bems8#pbf ltc3499bems8#trpbf ltcfb 8-lead plastic msop C40c to 85c consult ltc marketing for parts specified with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ top view dd package 8-lead (3mm 3mm) plastic dfn 5 6 7 8 9 4 3 2 1 shdn v in sw gnd vc fb v out ss t jmax = 125c, ja = 45c exposed pad (pin 9) is gnd, must be soldered to pcb vc fb v out ss shdn v in sw gnd 1 2 3 4 8 7 6 5 top view ms8 package 8-lead plastic msop t jmax = 125c, ja = 160c/w fb, ss to gnd ............................................. C 0.3v to 7v operating temperature range (notes 3, 4) ......................................... C40c to 85c storage temperature range ................. C65c to 125c lead temperature (soldering, 10 sec) msop .............................................................. 300c electrical characteristics symbol parameter conditions min typ max units supply v in minimum start-up voltage l 1.6 1.8 v v out output voltage adjust range l 2 6 v v fb fb voltage l 1.195 1.220 1.245 v the l denotes specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 2.4v, v out = 5v, shdn = 2.4v, t a = t j unless otherwise noted. (note 3)
ltc3499/ltc3499b 3 3499fc electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: specification is guaranteed by design and not 100% tested in production. note 3: the ltc3499e/ltc3499be are guaranteed to meet device specifications from 0c to 85c. specifications over the C40c to 85c operating temperature are assured by design, characterization and correlation with statistical process controls. the l denotes specifications that apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 2.4v, v out = 5v, shdn = 2.4v, t a = t j unless otherwise noted. (note 3) symbol parameter conditions min typ max units i fb fb input current v fb = 1.22v 3 50 na i vin v in quiescent current no output load l 300 600 a i sd v in quiescent current in shutdown shdn = 0v, v out = 0v 0.1 1 a i burst quiescent current C burst mode operation v in current at 2.4v (ltc3499 only) v out current at 5v (ltc3499 only) 20 1.5 a a i nmos nmos switch leakage current v sw = 6v 0.1 5 a i pmos pmos switch leakage current v out = 6v, v sw = 0v 0.1 5 a r nmos nmos switch on resistance v out = 3.3v v out = 5v 0.45 0.4 r pmos pmos switch on resistance v out = 3.3v v out = 5v 0.58 0.45 i lim nmos current limit l 0.75 1 a t dly, ilim current limit delay to output note 2 60 ns d max maximum duty cycle l 80 85 % d min minimum duty cycle l 0 % f osc frequency accuracy l 1 1.2 1.4 mhz g mea error amplifier transconductance 40 mhos i source error amplifier source current C5 a i sink error amplifier sink current 5 a i ss ss current source v ss = 1v C3 a v ov v out overvoltage threshold 6.8 v v ov(hyst) v out overvoltage hysteresis 400 mv shutdown v shdn(low) shdn input low voltage l 0.2 v v shdn(high) shdn input high voltage measured at sw l 1.2 v i sd shdn input current 1 a reverse battery i vout,revbatt v out reverse-battery current v out = 0v, v in = v shdn = v sw = C6v l 5 a i vin,revbatt v in and v sw reverse-battery current v out = 0v, v in = v shdn = v sw = C6v l C5 a i shdn ,revbatt shdn reverse-battery current v out = 0v, v in = v shdn = v sw = C6v l C5 a note 4: these ics include overtemperature protection that is intended to protect the devices during momentary overload conditions. junction temperatures will exceed 125c when overtemperature protection is active. continuous operation above the specified maximum operating temperature range may impair device reliability.
ltc3499/ltc3499b 4 3499fc typical performance characteristics load current (ma) 0.1 40 efficiency (%) power loss (mw) 50 60 70 80 90 100 0.1 1 10 100 1000 10000 100000 1 10 100 1000 3499 g01 v in = 3.2v v in = 2.4v v in = 1.8v power loss efficiency load current (ma) 0.1 70 80 100 100 3499 g03 60 50 1 10 1000 40 30 90 100 1000 100000 10 1 0.1 10000 efficiency (%) power loss (mw) v in = 4.2v v in = 3.6v v in = 3v power loss efficiency load current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 3499 g17 0 1 v in = 3.2v v in = 2.4v v in = 1.8v temperature (c) ?50 current limit (a) 1.00 1.01 1.02 25 75 3499 g04 0.99 0.98 0.97 0.96 ?25 0 50 1.03 1.04 100 load current (ma) 0.1 40 efficiency (%) power loss (mw) 50 60 70 80 90 100 0.1 1 10 100 1000 10000 100000 1 10 100 1000 3499 g02 v in = 3v v in = 2.4v v in = 1.8v power loss efficiency input voltage (v) 1.8 0 burst mode output current threshold (ma) 10 20 30 40 60 2.3 2.8 3.3 3.8 3499 g05 4.3 4.8 50 v out = 5v v in (v) 1.5 output current (ma) 400 500 600 5.5 3499 g06 300 200 0 2.5 3.5 4.5 100 800 700 v out = 3.3v v out = 5v v in > v out v in > v out v in (v) 1.5 0 input current (a) 20 60 80 100 200 140 2.5 3.5 3499 g07 40 160 180 120 4.5 5.5 v out = 3.3v v out = 5v temperature (c) ?50 0 burst mode quiescent current (a) 5 10 15 20 30 ?25 0 25 50 3499 g08 75 100 25 current limit accuracy vs temperature 2-cell to 3.3v efficiency vs load current (ltc3499 only) burst mode output current threshold vs input voltage (ltc3499 only) maximum output current capability vs v in no load input current vs v in (ltc3499 only) burst mode quiescent current vs temperature (ltc3499 only) 2-cell to 5v efficiency vs load current (ltc3499 only) li-ion to 5v efficiency vs load current (ltc3499 only) 2-cell to 5v efficiency vs load current (ltc3499b only) t a = 25c, unless otherwise noted.
ltc3499/ltc3499b 5 3499fc temperature (c) ?50 fb voltage (v) 25 75 3499 g09 ?25 0 50 1.2215 1.2210 1.2205 1.2200 1.2195 1.2190 1.2185 1.2220 1.2225 100 temperature (c) ?50 0 burst mode quiescent current (a) 5 10 15 20 30 ?25 0 25 50 3499 g08 75 100 25 v in and sw voltage (v) ?6 ?1.0 reverse-battery current (a) 0 ?2 2 ?4 0 4 3499 g11 6 ?0.5 1.0 0.5 shdn = 0v v out = 0v v out 50mv/div 20s/div 3499 g12 v in = 2.4v v out = 5v l = 4.7h c out = 10f c ff = 10pf (feedforward capacitor from v out to fb) i l 50ma/div v out 200mv/div 200s/div 3499 g13 v in = 2.4v v out = 5v i load = 50ma to 200ma r z = 100k c f = 680pf c out = 10f l = 4.7h i load 100ma/div 200ma 50ma sw 2v/div 200ns/div 3499 g14 v in = 2.4v v out = 5v l = 4.7h i l 100ma/div v in 2v/div ss 2v/div v out 2v/div 1ms/div 3499g15 v in = 2.4v v out = 5v l = 4.7h c ss = 0.01f c out = 10f i l 200ma/div sw 2v/div 200ns/div 3499 g16 v in = 2.4v v out = 5v l = 4.7h i l 100ma/div burst mode operation (ltc3499 only) load transient 50ma to 200ma fixed frequency discontinous mode operation soft-start into 25 load fixed frequency operation fb voltage vs temperature burst mode quiescent current vs temperature v in and sw reverse-battery current vs v in and sw voltage typical performance characteristics t a = 25c, unless otherwise noted.
ltc3499/ltc3499b 6 3499fc pin functions shdn (pin 1): shutdown input for ic. connect to a voltage greater than 1.2v to enable and a voltage less than 0.2v to disable the ltc3499/ltc3499b. v in (pin 2): input supply voltage. the valid operating voltage is between 1.8v to 5.5v. v in has reverse battery protection. since the ltc3499/ltc3499b use v in as the main bias source, bypass with a low esr ceramic capaci - tor of at least 2.2f. sw (pin 3): switch pin. connect an inductor from v in to this pin with a value between 2.2h and 10h. keep pcb trace lengths as short and wide as possible to minimize emi and voltage overshoot. if the inductor current falls to zero or shdn is low an internal 250 antiringing switch is connected from v in to sw to minimize emi. gnd (pin 4/exposed pad, dd package pin 9): signal and power ground. the dd package exposed pad must be soldered to the pcb power ground plane for electrical connection and rated thermal performance. ss (pin 5): soft-start input. connect a capacitor from ss to ground to control the inrush current at start-up. an internal 3a current source charges this pin. ss will be discharged if shdn is pulled low, thermal shutdown occurs or v in is below the minimum operating voltage. v out (pin 6): power supply output. connect a low esr output filter capacitor from this pin to the ground plane. fb (pin 7): fb input to error amplifier. connect a resistor divider tap from v out to this pin to set the output voltage. the output voltage can be adjusted between 2v and 6v. referring to the functional block diagram, the output voltage is given by: v out = 1.22 ? 1+ r1 r2 ? ? ? ? ? ? ? ? ? ? ? ? vc (pin 8): error amplifier output. a frequency com - pensation network is connected from this pin to gnd to compensate the boost converter loop. see closing the feedthrough loop section for guidelines.
ltc3499/ltc3499b 7 3499fc functional block diagram gnd 3499 f01 4 v out v select c ss c out ss vc c c1 rz c c2 ? + ov comparator reverse-battery comparator 1 = off c ff (optional) fb ? + ? + ? + ? + ? + ? + enable tsd pwm comparator enable sd sleep 3a 1.22v r1 r2 burst mode control (ltc3499 only) 1.2mhz oscillator slope compensation pwm logic and drivers shdn reference bias uvlo current limit comparator 0.8v 1a typ i zero sw l 3 v in anti-ring 250? c in v in 1.8v to 5.5v 2 + 6 8 7 sleep enable thermal sd v out 6.8v ? + 1 = closed 1 = closed error amplifier 0.7v 1 ? + 5k 5 figure 1: functional block diagram
ltc3499/ltc3499b 8 3499fc operation the ltc3499/ltc3499b provide high efficiency, low noise power for boost applications with output voltages up to 6v. operation can be best understood by referring to the functional block diagram in figure 1. the synchro - nous boost converters are housed in either an 8-lead (3mm? ?3mm) dfn or msop package and operates at a fixed 1.2mhz. with a 1.6v typical minimum v in voltage these devices are well suited for applications using two or three alkaline or nickel-metal hydride (nimh) cells or one lithium-ion (li-ion) cell. the ltc3499/ltc3499b have integrated circuitry which protects the battery, ic, and circuitry powered by the device in the event that the input batteries are connected backwards (reverse battery protection). the true output disconnect feature eliminates inrush current and allows v out to be zero volts during shutdown. the current mode architecture simplifies loop compensation with excellent load transient response. the low r ds(on) , low gate charge synchronous switches eliminate the need for an external schottky diode recti - fier, and provide efficient high frequency pulse width modulation (pwm). burst mode quiescent current to the ltc3499 is only 20a from v in , maximizing battery life. the ltc3499b does not have burst mode operation and the device continues switching at constant frequency. this results in the absence of low frequency output ripple at the expense of light load efficiency. low noise fixed frequency operation shutdown the ltc3499/ltc3499b are shut down by pulling shdn below 0.2v, and activated by pulling the pin above 1.2v. shdn can be driven above v in or v out as long as it is limited to less than the absolute maximum rating. soft-start the soft-start time is programmed with an external capaci - tor to ground on ss. an internal current source charges the capacitor, c ss , with a nominal 3a. the voltage on ss is used to clamp the voltage on vc. the soft-start time is given by t (msec) = c ss (f) ? 200 in the event of an external shutdown or thermal shutdown (tsd), c ss is discharged through a nominal 5k imped - ance to gnd. once the condition is removed and ss is discharged near ground, a soft-start will automatically be re-initiated. error amplifier a transconductance amplifier generates an error voltage from the difference between the positive input internally connected to the 1.22v reference and the negative input connected to fb. a simple compensation network is placed from vc to ground. internal clamps limit the minimum and maximum error amplifier output voltage for improved large signal transient response. a voltage divider from v out to gnd programs the output voltage via fb from 2v to 6v and is defined by the following equation: v out = 1.22 s 1+ r1 r2 ? ? ? ? ? ? ? ? ? ? ? ? current sensing lossless current sensing converts the peak current signal into a voltage which is summed with the internal slope compensation. this summed signal is compared to the error amplifier output to provide a peak current control command for the pwm. peak switch current is limited to 750ma minimum. antiringing control the antiringing control connects a resistor across the inductor to damp the ringing on sw in discontinuous conduction mode. the lc resonant ringing (l = inductor, c sw = capacitance on sw) is low energy, but can cause emi radiation if antiringing control is not present. zero current comparator the zero current comparator monitors the inductor current to the output and shuts off the synchronous rectifier once this current reduces to approximately 40ma, preventing negative inductor current.
ltc3499/ltc3499b 9 3499fc operation reverse-battery protection connecting the battery backwards poses a severe problem to most power converters. at a minimum the battery will be quickly discharged. almost all ics have an inherent diode from v in (cathode) to ground (anode) which conducts ap- preciable current when v in drops more than 0.7v below ground. under this condition the integrated circuit will most likely be damaged due to the excessive current draw. there exists the possibility for the battery and circuitry powered by the device to also be damaged. the ltc3499/ ltc3499b have integrated circuitry which allows negligible current flow under a reverse-battery condition, protecting the battery, device and circuitry attached to the output. a graph of the reverse-battery current drawn is shown in the typical performance characteristics. discrete methods of reverse battery protection put ad - ditional dissipative elements in the high current path reducing efficiency while increasing component count to implement protection. the ltc3499/ltc3499b do not suffer from either of these drawbacks. burst mode operation (ltc3499 only) portable devices frequently spend extended time in low power or stand-by mode, only drawing high power when specific functions are enabled. in order to improve battery life in these types of products, high power converter ef- ficiency needs to be maintained over a wide output power range. in addition to its high efficiency at moderate and heavy loads, the ltc3499 includes automatic burst mode operation that improves efficiency of the power converter at light loads. burst mode operation is initiated if the output load current falls below an internally programmed threshold (see typical performance graph, output load burst mode threshold vs v in ). once initiated the burst mode operation circuitry shuts down most of the circuitry in the ltc3499, keeping alive only the circuitry required to monitor the output voltage. this state is referred to as sleep. in sleep, the ltc3499 only draws 20a from the input supply, greatly enhancing efficiency. when the output has drooped approximately 1% from its nominal regulation point, the ltc3499 wakes up and commences normal pwm operation. the output capacitor will recharge causing the ltc3499 to re-enter sleep if the output load current remains less than the sleep threshold. the frequency of this intermittent pwm (or burst) operation is proportional to load current. therefore, as the load current drops further below the burst threshold, the ltc3499 operates in pwm mode less frequently. when the load current increases above the burst threshold, the lc3499 will resume continuous pwm operation seamlessly. referring to the functional block diagram, an optional capacitor, c ff , between v out and fb in some circumstances can reduce peak-to-peak v out ripple and input quiescent current during burst mode operation. typical values for c ff range from 10pf to 220pf. output disconnect and inrush current limiting the ltc3499/ltc3499b are designed to allow true output disconnect by eliminating body diode conduction of the internal p-channel mosfet switch. this allows v out to go to zero volts during shutdown without drawing any current from the input source. it also provides for inrush current limiting at turn-on, minimizing surge current seen by the input supply. v in > v out operation the ltc3499/ltc3499b will maintain voltage regulation when the input voltage is above the output voltage. this is achieved by terminating the switching on the synchronous p-channel mosfet and applying v in statically on the gate. this will ensure the volts ? seconds of the inductor will reverse during the time current is flowing to the output. since this mode will dissipate more power in the ic, the maximum output current is limited in order to maintain an acceptable junction temperature: i out(max) ? 125 ? t a ja s v in + 1.5 ( ) ? v out ( ) where t a = ambient temperature and ja is the package thermal resistance (45c/w for the dd8 and 160c/w for the ms8). for example at v in = 4.5v, v out = 3.3v and t a = 85c in the dd8 package, the maximum output current is 330ma.
ltc3499/ltc3499b 10 3499fc pcb layout guidelines the high speed operation of the ltc3499/ltc3499b demand careful attention to board layout. advertised per - formance will not be achieved with careless layout. figure 2 shows the recommended component placement. a large copper area will help to lower the chip temperature. traces carrying high current (sw, v out , gnd) are kept short. the lead length to the battery should be kept as short as possible. the v in and v out ceramic capacitors should be placed as close to the ic pins as possible. applications information the inductor current ripple is typically set to 20% to 40% of the maximum inductor current. for high efficiency, choose an inductor with high frequency core material, such as ferrite, to reduce core losses. the inductor should have low esr (equivalent series resistance) to reduce the i 2 r power losses, and must be able to handle the peak inductor current without saturating. to minimize radiated noise, use a toroidal or shielded inductor. see table 1 for some suggested inductor suppliers. table 1. inductor vendor information part number supplier web site mss5131 and mos6020 series coilcraft www.coilcraft.com slf7028 and slf7045 series tdk www.component.tdk.com lqh55d series murata www.murata.com cdrh4d28 series sumida www.sumida.com d53lc and d62cb series toko www.tokoam.com dt0703 series coev www.coev.net mjpf2520 series fdk www.fdk.com output capacitor selection the output voltage ripple has three components to it. the bulk value of the capacitor is set to reduce the ripple due to charge into the capacitor each cycle. the maximum ripple voltage due to charge is given by: v rbulk = i p ? v in c out ? v out ? f ( ) where i p = peak inductor current and f = switching frequency. the esr (equivalent series resistance) is usually the most dominant factor for ripple in most power converters. the ripple due to capacitor esr is simply given by: v rcesr = i p t esr where c esr = capacitor equivalent series resistance. figure 2: recommended component placement 3499 f02 exposed pad for dd8 sw c c1 c c2 r2 rz r1 l v in v batt c in c out gnd fb ss vc 9 5 7 8 4 3 2 1 6 v out + c ss shdn component selection inductor selection the ltc3499/ltc3499b allow the use of small surface mount inductors and chip inductors due to the fast 1.2mhz switching frequency. a minimum inductance value of 2.2h is required. larger values of inductance will allow greater output current capability by reducing the induc - tor ripple current. increasing the inductance above 10h will increase total solution area while providing minimal improvement in output current capability.
ltc3499/ltc3499b 11 3499fc applications information the esl (equivalent series inductance) is also an important factor for high frequency converters. using small surface mount ceramic capacitors, placed as close as possible to v out , will minimize esl. low esr capacitors should be used to minimize output voltage ripple. a 4.7f to 10f output capacitor is suf - ficient for most applications and should be placed as close to v out as possible. larger values may be used to obtain even lower output ripple and improve transient response. x5r and x7r dielectric materials are preferred for their ability to maintain capacitance over wide voltage and temperature ranges. input capacitor selection the input filter capacitor reduces peak currents drawn from the input source and reduces input switching noise. ceramic capacitors are a good choice for input decoupling due to their low esr and ability to withstand reverse voltage (i.e. non-polar nature). the capacitor should be located as close as possible to the device. in most applications a 2.2f input capacitor is sufficient. larger values may be used without limitations. table 2 shows a list of several ceramic capacitor manufacturers. table 2. capacitor vendor information supplier web site avx www.avxcorp.com murata www.murata.com tdk www.component.tdk.com taiyo yuden www.t-yuden.com thermal considerations for the ltc3499/ltc3499b to deliver full output power, it is imperative that a good thermal path be provided to dis - sipate the heat generated within the package. for the dfn package, this can be accomplished by taking advantage of the large thermal pad on the underside of the device. it is recommended that multiple vias in the printed circuit board be used to conduct heat away from the part and into a copper plane with as much area as possible. if the junction temperature continues to rise, the part will go into thermal shutdown where switching will stop until the temperature drops. closing the feedback loop the ltc3499/ltc3499b utilize current mode control, with internal slope compensation. current mode control eliminates the 2nd order filter due to the inductor and out - put capacitor exhibited in voltage mode controllers, thus simplifying it to a single pole filter response. the product of the modulator control to output dc gain and the error amp open loop gain gives the dc gain of the system: g dc = g control ? g ea ? v ref v out ? g current _ sense g control = 2 ? v in i out , g ea 1000, g current _ sense = 1 r ds on ( ) the output filter pole is given by: f filter _ pole = i out ? v out ? c out ( ) where c out is the output filter capacitor. the output filter zero is given by: f filter _ zero = 1 2 ? ? r esr ? c out ( ) where r esr is the capacitor equivalent series resistance. a troublesome feature of the boost regulator topology is the right half plane (rhp) zero, given by: f rhpz = v in 2 2 ? ? i out ? v out ? l ( )
ltc3499/ltc3499b 12 3499fc applications information there is a resultant gain increase with a phase lag which makes it difficult to compensate the loop. at heavy loads the right half plane zero can occur at a relatively low frequency. the loop gain is typically rolled off before the rhp zero frequency. the typical error amp compensation is shown in figure 3, following the equations for the loop dynamics: f pole1 ~ 1 2 ? ? 10e6 ? c c1 ( ) which is extremely close to dc. f zero1 = 1 2 ? ? r z ? c c1 ( ) f pole2 = 1 2 ? ? r z ? c c2 ( ) figure 3: typical error amplifier compensation 3499 f03 v out c c1 r z c c2 fb ? + 1.22v r1 r2 8 error amplifier 6 7 vc 8
ltc3499/ltc3499b 13 3499fc typical applications l 4.7h 3499 f05a ltc3499 sw fb gnd v in v out shdn vc ss c out 10f 5r v out 5v 175ma v in 2 aa cells 1.8v to 3.2v 1m 324k 0.01f 330pf 100k c in 2.2f 5r + c in : taiyo yuden x5r jmk212bj225md c out : taiyo yuden x5r jmk212bj106md l: coilcraft mss5131-472mlb offon lithium-ion to 5v, 350ma two cells to 5v, 175ma lithium-ion to 5v efficiency two cells to 5v efficiency l 4.7h 3499 f04a ltc3499 sw fb gnd v in v out shdn vc ss offon c out 10f 5r v out 5v 350ma c in : taiyo yuden x5r jmk212bj225md c out : taiyo yuden x5r jmk212bj106md l: coilcraft mss5131-472mlb v in li-ion 3.1v to 4.2v 1m 324k 0.01f 330pf 100k c in 2.2f 5r + load current (ma) 0.1 70 80 100 100 3499 g03 60 50 1 10 1000 40 30 90 100 1000 100000 10 1 0.1 10000 efficiency (%) power loss (mw) v in = 4.2v v in = 3.6v v in = 3v power loss efficiency load current (ma) 0.1 40 efficiency (%) power loss (mw) 50 60 70 80 90 100 0.1 1 10 100 1000 10000 100000 1 10 100 1000 3499 g01 v in = 3.2v v in = 2.4v v in = 1.8v power loss efficiency
ltc3499/ltc3499b 14 3499fc package description 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-229 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on top and bottom of package 0.40 0.10 bottom view?exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.125 typ 2.38 0.10 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 ? 0.05 (dd8) dfn 0509 rev c 0.25 0.05 2.38 0.05 recommended solder pad pitch and dimensions apply solder mask to areas that are not soldered 1.65 0.05 (2 sides) 2.10 0.05 0.50 bsc 0.70 0.05 3.5 0.05 package outline 0.25 0.05 0.50 bsc dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698 rev c) msop (ms8) 0307 rev f 0.53 0.152 (.021 .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or protrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 ? 0.38 (.009 ? .015) typ 0.1016 0.0508 (.004 .002) 0.86 (.034) ref 0.65 (.0256) bsc 0 ? 6 typ detail ?a? detail ?a? gauge plane 1 2 3 4 4.90 0.152 (.193 .006) 8 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 5.23 (.206) min 3.20 ? 3.45 (.126 ? .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc ms8 package 8-lead plastic msop (reference ltc dwg # 05-08-1660 rev f)
ltc3499/ltc3499b 15 3499fc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number c 3/11 updated pin functions for pins 4 and 9. corrected typo in equation from f rphz to f rhpz . 6 11 (revision history begins at rev c)
ltc3499/ltc3499b 16 3499fc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2006 lt 0311 rev c ? printed in usa related parts typical application part number description comments lt1930/lt1930a 1a (i sw ), 1.2mhz/2.2mhz, high efficiency step-up dc/dc converter high efficiency, v in : 2.6v to 16v, v out(max) = 34v, i q = 4.2ma/5.5ma, i sd < 1a, thinsot package lt1961 1.5a (i sw ), 1.25mhz, high efficiency step-up dc/dc converter 90% efficiency, v in : 3v to 25v, v out(max) = 35v, i q = 0.9ma, i sd < 6a, ms8e package ltc3400/ltc3400b 600ma (i sw ), 1.2mhz, synchronous step-up dc/dc converter 92% efficiency, v in : 0.5v to 5v, v out(max) = 5v, i q = 19a/300a, i sd < 1a, thinsot package ltc3401 1a (i sw ), 3mhz, synchronous step-up dc/dc converter 97% efficiency, vin: 0.5v to 5v, v out(max) = 5.5v, i q = 38a, i sd < 1a, 10-lead ms package ltc3402 2a (i sw ), 3mhz, synchronous step-up dc/dc converter 97% efficiency, vin: 0.5v to 5v, v out(max) = 5.5v, i q = 38a, i sd < 1a, 10-lead ms package ltc3421 3a (i sw ), 3mhz, synchronous step-up dc/dc converter with output disconnect 95% efficiency, v in : 0.5v to 4.5v, v out(max) = 5.25v, i q = 12a, i sd < 1a, 24-lead qfn package ltc3422 1.5a (i sw ), 3mhz, synchronous step-up dc/dc converter with output disconnect 95% efficiency, v in : 0.5v to 4.5v, v out(max) = 5.25v, i q = 25a, i sd < 1a ltc3425 5a (i sw ), 8mhz, 4-phase synchronous step-up dc/dc converter with output disconnect 95% efficiency, v in : 0.5v to 4.5v, v out(max) = 5.25v, i q = 12a, i sd < 1a, 32-lead qfn package ltc3427 500ma (i sw ), 1.25mhz, synchronous step-up dc/dc converter with soft-start/output disconnect 94% efficiency, v in : 1.8v to 5v, v out(max) = 5.25v, i sd < 1a, dfn package ltc3429/ltc3429b 600ma (i sw ), 550khz, synchronous step-up dc/dc converters with soft-start/output disconnect 92% efficiency, v in : 0.5v to 4.3v, v out(max) = 5v, i q = 20a, i sd < 1a, thinsot package ltc3458/ltc3458l 1.4a/1.7a (i sw ), 1.5mhz, synchronous step-up dc/dc converter with soft-start/output disconnect 93% efficiency, v in : 1.5v to 6v, v out(max) = 7.5v/6v, i q = 15a, i sd < 1a, dfn package ltc3525 400ma (i sw ), synchronous step-up dc/dc converter in sc70 94% efficiency, v in : 0.5v to 4.5v, v out(max) = 5.25v, i q = 7a, i sd < 1a, output disconnect l 4.7h 3499 f06a ltc3499 sw fb gnd v in v out shdn vc ss c out 10f 5r v out 3.3v 250ma 332k 562k 0.01f 330pf 100k c in 2.2f 5r v in 2 aa cells 1.8v to 3.2v + c in : taiyo yuden x5r jmk212bj225md c out : taiyo yuden x5r jmk212bj106md l: coilcraft mss5131-472mb offon two cells to 3.3v, 250ma two cells to 5v efficiency load current (ma) 0.1 40 efficiency (%) power loss (mw) 50 60 70 80 90 100 0.1 1 10 100 1000 10000 100000 1 10 100 1000 3499 f06b v in = 3v v in = 2.4v v in = 1.8v power loss efficiency

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